ICmasters, a semiconductor reverse engineering and IP companies firm, has completed a preliminary examination of Apple’s A14 Bionic system-on-chip (SoC) utilizing a transmission electron microscopy (TEM). As written by semianalysis, the analysts at ICmasters revealed die dimension and transistor density of the SoC. Such particulars expose capabilities of course of applied sciences and a few facets about priorities of chip designers. However can a die shot of Apple’s A14 give any thought about what to anticipate from the corporate’s upcoming processors for notebooks and desktops?
Apple’s A14 Bionic: A 88-mm2 Energy Home
Apple’s A14 Bionic SoC consists of 11.8 billion transistors and is made utilizing TSMC’s N5 (5nm) course of know-how. The chip packs six general-purpose processing cores consisting of two high-performance FireStorm cores and 4 IceStorm cores. A quad-cluster GPU, 16-core neural engine with 11 TOPS efficiency, and a wide range of special-purpose accelerators completes the SoC.
The A14 Bionic processor has a die dimension of 88 mm2, down from 98.48 mm2 in case of the A13 Bionic. The standard of the picture will not be precisely excessive, however with a use of tough serviette math we are able to collect that the dual-core FireStorm complicated with an enormous L2 cache is round 9.1 mm2, the quad-core IceStorm complicated with a small L2 cache is roughly 6.44 mm2, whereas the GPU occupies about 11.65 mm2. We all know that Apple has used unified system cache within the current years, however it’s not straightforward to search out it on the picture.
Common transistor density of the A14 Bionic chip is 134.09 million transistors per mm2, up from 89.97 million transistors per mm2 in case of the A13 Bionic, in line with ICmasters. Contemplating that semiconductor makers have a tendency to make use of totally different methodologies when measuring transistor density, we can’t actually evaluate TSMC’s N5 to Intel’s 10 nm’s ~100 mega transistors per mm2 as it will be an apples-to-oranges type of comparability. In the meantime, transistor density of Apple’s A14 Bionic appears considerably decrease when in comparison with TSMC’s theoretical peak common transistor density promised for N5-based SoCs. This has a number of explanations.
Transistor density varies for various chip buildings. Logic buildings scale properly with each new node, however SRAM, I/O, and analog elements hardy scale today, so peak numbers marketed by foundries are extremely theoretical, whereas real-world numbers are design dependent.
Designs of contemporary processors are extraordinarily SRAM-intensive as a result of SRAM is used for registers in addition to caches. SRAM wants interconnect and circuitry to entry it and such interconnects don’t all the time scale properly. Given that every one fashionable SoCs comprise several types of processor cores, in addition they use a great deal of caches.
There are additionally elements of the chip that need to function at larger clocks (e.g., general-purpose cores), these elements can sacrifice density for efficiency by utilizing high-performance cells which are often bigger. The truth is, given Apple’s concentrate on final efficiency, its SoCs often function massive caches (to some extent, this may be confirmed by the die shot supplied by SemiAnalysys/ICmasters) and possibly different efficiency optimizations.
Certainly, A14’s early performance numbers obtained in Speedometer 2.0, a browser benchmark that measures the responsiveness of Net purposes by simulating moderately primitive person actions, point out that the SoC will be as much as 54% quicker than Intel’s eight-core Core i9 which powers Apple’s MacBook Professional from late 2019. Efficiency numbers in Speedometer 2.0 can’t give any details about efficiency in complicated purposes which are optimized for contemporary x86 CPUs, but it surely provides an thought about most theoretical efficiency an SoC can obtain. To some extent, this check will be thought of as a drag race for contemporary computer systems.
Speculations: Can the A14 Bionic Give an Concept About Apple’s SoCs for Macs?
Apple has been growing its SoCs for smartphones, tablets, smartwatches and extra not too long ago for wearables and hearables for greater than a decade now. When it wanted a better-performing SoC for its iPad Air and iPad Professional tablets, it often added CPU cores, a greater GPU, extra in-package reminiscence with a wider interface, and a warmth spreader for higher dissipation. Whereas it’s only a hypothesis at this level, we are able to anticipate the corporate to make use of an analogous tactic when growing its SoCs for notebooks and desktops.
Judging from dimensions of Apple’s FireStorm complicated in addition to the brand new GPU, the corporate can double the variety of high-performance cores and GPU clusters with out considerably growing die dimension of the A14 Bionic. It’s going to after all have to enhance its reminiscence subsystem (which could contain a further 64-bit reminiscence channel and enlarged system cache). However even with all of the ‘upgrades’ its SoC for PCs could have a die dimension much like that of Intel’s higher-end variations of Ice Lake-U CPUs which are smaller than Intel’s newest Tiger Lake-U processors.
Apple has not revealed many particulars about its SoCs for PCs besides saying that they may use the identical frequent structure that’s used throughout all of its units. In the meantime, the corporate purposely referred to as these processors ‘Apple silicon’ moderately than one thing like ‘A-series for Macs.’
At this level, it appears like Apple can scale its A14 Bionic design by including CPU cores and GPU horsepower with out risking of constructing it too massive. However Apple has by no means confirmed that it’ll certainly use its high-performance smartphone cores for its PC SoCs, so their utilization is a hypothesis at this level.